Project Description

Course Overview

This course focuses on the design of Gallium Nitride (GaN) power amplifiers (PAs) realised as monolithic microwave integrated circuits (MMICs). The course is based on a detailed discussion of four GaN PA design case studies.

The course begins with a brief introduction to the GaN transistor, including a summary of the main differences between GaN HEMT and GaAs PHEMT PAs. This includes selection of suitable devices and bias for a given specification. The course then moves on to discuss a basic approach to designing GaN power amplifiers, starting with a single transistor example. Next we discuss thermal considerations when designing with GaN. These are important in all power amplifiers, but particularly for high-power for GaN PAs.

The course then discusses some other PA designs starting with a 15 GHz PA for line-of-sight links. The next example is a 2–18 GHz non-uniform distributed PA for broadband operation. The final example is a 25 GHz X-band power amplifier for radar applications. The course concludes with a brief summary of the main points covered.

What you will learn
  • GaN transistor overview
  • GaN fabrication process
  • Device selection and bias

  • Stabilising transistors

  • Load pull technique

  • Thermal considerations

  • Process design kit (PDK)

  • Circuit schematics and layouts

  • Simulated results

Technical Level


Time to Complete

Approx. 1 hr 30 mins

Course ID


Course Curriculum

7 modules – 34 video lessons – 80 mins total
– video lesson

1.1 Course Overview  

2.1 GaN Transistor Overview  
2.2 How GaN HEMT PAs Differ  
2.3 Device Selection and Bias  

3.1 Target Specifications  
3.2 Stabilising the Transistor  
3.3 Load Pull Test Bench  
3.4 Circuit Schematic  
3.5 Simulated Performance  
3.6 Thermal Considerations  

4.1 Target Specifications  
4.2 GaN Process  
4.3 Preliminary Simulations  
4.4 Circuit Schematic  
4.5 Layout  
4.6 Simulated Performance  
4.7 Improvements to OIP3  
4.8 High-Order Modulation Simulations  

5.1 Target Specifications  
5.2 Architecture Features  
5.3 Circuit Schematic  
5.4 Layout  
5.5 Simulated Performance  

6.1 Target Specifications  
6.2 Process Design Kit (PDK) Example  
6.3 Device Size and PA Topology  
6.4 Gmax and Stability Factor (K)  
6.5 Load Pull of Single Transistor  
6.6 Schematic of 1-Cell Amplifier  
6.7 Small and Large Signal Simulation of 1-Cell  
6.8 Architecture and Performance of 2-Stage Power Amplifier  
6.9 DC Current with Increasing Drive  
6.10 Performance Summary and Layout  

7.1 Summary and Conclusions  

Includes 1-year unlimited individual access to all course content

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